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Details of Grant 

EPSRC Reference: EP/D503213/1
Title: A demonstrator smart-camera system based on the vision chip device
Principal Investigator: Dudek, Professor P
Other Investigators:
Hicks, Professor P
Researcher Co-Investigators:
Project Partners:
Department: Electrical and Electronic Engineering
Organisation: University of Manchester, The
Scheme: Follow on Fund (Pre-FEC)
Starts: 24 June 2005 Ends: 23 June 2006 Value (£): 45,613
EPSRC Research Topic Classifications:
Digital Signal Processing Image & Vision Computing
Parallel Computing System on Chip
VLSI Design
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
This application follows on from a recently completed EPSRC research grant A programmable focal plane processor array (GR/R 52688). During the course of that research a `vision chip' has been developed. The technology is based on integrating a processor array within the CMOS image sensor device. This massively parallel architecture and novel approach to the processor design result in very high computational performance, at very low power consumption, providing a significant improvement over currently available computer vision systems. The work has now reached a stage where commercialisation of the technology can be envisaged. The objective of this project is to develop a prototype portable smart-camera system based on our vision chip, in order to demonstrate the performance of the chip in some typical real-life applications. A portable demonstrator system will provide a proof-of-concept and serve as a vehicle for showcasing the technology to potential investors and licensees.
Key Findings
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Potential use in non-academic contexts
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Impacts
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Summary
Date Materialised
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Project URL:  
Further Information:  
Organisation Website: http://www.man.ac.uk