Details of Grant 

EPSRC Reference:	EP/E036368/1
Title:	An Efficient Page and Object-based Transactional Memory System
Principal Investigator:	Watson, Professor I
Other Investigators:	Kirkham, Dr CC
Researcher Co-Investigators:
Project Partners:
Department:	Computer Science
Organisation:	University of Manchester, The
Scheme:	Standard Research
Starts:	01 April 2007	Ends:	30 June 2010	Value (£):	594,574
EPSRC Research Topic Classifications:	Parallel Computing System on Chip
EPSRC Industrial Sector Classifications:	No relevance to Underpinning Sectors
Related Grants:
Panel History:
Summary on Grant Application Form
For the last 25 years, the processor chips inside PCs, games consoles etc. have increased in speed many times over. This is often refereed to as 'Moores Law' which states that this increase will be approximately a factor of 2 every 18 months.However, Moores Law no longer holds for the latest semiconductor technology. Factors such as power dissipation prevent the continued shrinking of electronic circuits on which it depends.Processor manufacturers are therefore turning to 'multi-core' processors to achieve future increases in performance. A core being the circuit of a single processing unit of the structure found in previous computers. It is already possible to buy PCs which have dual cores on a single chip and advanced processors intended for commercial applications have several cores.Unfortunately the techniques required to write programs for these multi-core processors, particularly for general purpose applications, rely on mechanisms to share the memory between processors which require special hardware to ensure that they all see a consistent view of the shared memory over a common communication system.Although it is possible to build such hardware to perform efficiently for small numbers of processors, as the number of processors and the size of the communication system increases, it is impossible to maintain the required speed. This will therefore limit the size of future multi-core systems unless new techniques are found.Transactional Memory is a new approach to writing programs, to make use of multi-core processors, which does not require the same fully consistent view of shared memory. Instead, individual processors work on their own temporary copies of shared memory and reconcile its state at the end of defined tasks. This approach can not only remove the need for complex consistency maintaining mechanisms but also result in methods for writing multi-task programs which are easier to understand.However, Transactional Memory requires organisation specifically to support the maintenance and reconciliation of temporary shared copies. Current proposals to do this have removed some of the restrictions of conventional multi-core systems but introduced others of their own.This project proposes to perform a practical investigation of a novel Transactional Memory scheme which builds upon previous similar work but uses properties particular to the Object Oriented style of programming, concerned with the structuring of data, to avoid many of the existing problems. It uses memory structuring techniques which have been shown to be advantageous to the Object Oriented style and extends these to the world of Transactions. In addition, it will investigate support for the optimisation of Transactional execution using the highly flexible software systems which have been developed for the execution of Object Oriented programs.
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Organisation Website:	http://www.man.ac.uk