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Details of Grant 

EPSRC Reference: EP/F026129/1
Title: Screen-Grid FET Fabrication / progressing pump priming project
Principal Investigator: Fobelets, Dr K
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department: Electrical and Electronic Engineering
Organisation: Imperial College London
Scheme: Standard Research
Starts: 11 October 2007 Ends: 10 May 2008 Value (£): 80,463
EPSRC Research Topic Classifications:
Electronic Devices & Subsys.
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
A novel Field Effect Transistor structure was proposed with a peculiar 3D gating configuration - the Screen-Grid FET (SGrFET). In this geometry the gate, that controls the carriers flowing in the channel, are gate cylinders perpendicular to the current flow in contrast to the classical approach where the gate is in the same plane as the channel. Simulations on this novel device geometry show promising characteristics that are maintained whilst downscaling to the nanometer scale and also show a high one-device functionality for logic applications. Moreover the novel gate geometry - holes in the surface - would lend themselves to trapping molecules and the FET character of the device would amplify the resulting signal.Some of the fabrication steps needed to make this novel device are not standard and need to be investigated in order to ensure that making the devices will be possible in the future. The research project is written to that aim. At this stage a small amount of silicon on insulator (SOI) wafers and test wafers have been processed to show the feasibility of gate holes fabrication. The funding requested here will help to progress this batch to the final SGrFET stage. This will allow full feedback on fabrication issues and will also give the first experimental results on the novel device.
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Organisation Website: http://www.imperial.ac.uk