EPSRC Reference: |
EP/G00210X/1 |
Title: |
Research Cluster on the use of novel hardware for real-time computing for the Digital Economy |
Principal Investigator: |
Giles, Professor M |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Oxford e-Research Centre |
Organisation: |
University of Oxford |
Scheme: |
Standard Research |
Starts: |
01 April 2008 |
Ends: |
31 March 2009 |
Value (£): |
165,281
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EPSRC Research Topic Classifications: |
Electronic Devices & Subsys. |
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EPSRC Industrial Sector Classifications: |
No relevance to Underpinning Sectors |
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Related Grants: |
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Panel History: |
Panel Date | Panel Name | Outcome |
13 Mar 2008
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Digital Economy Feasibility Studies & Networks
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Announced
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Summary on Grant Application Form |
Field-programmable gate arrays (FPGAs) and graphical processing units (GPUs) are two kinds of computing hardware which offer the potential for factor 10-100 improvements in price/performance and enery efficiency compared to standard Intel and AMD processors. Although this hardware capability has existed for many years, it is only recently that the software tools have been developed to make it relatively easy for this power to be harnessed.This proposal is to fund a Research Cluster which will bring together computing experts who are specialists in working with FPGAs and GPUs, and application specialists working in key Digital Economy area, bioinformatics, medical image processing, digital media and computational finance. The interaction will be two-way, the computing specialists learning more about the computational needs and challenges of the applications, and the application specialists learning about the potential offered by these hardware platforms and the challenges in achieving this potential in practice.A number of different mechanisms will be used to build a community spirit amongst this group of researchers, most of whom have not previously known of each other's work. In addition to a kick-off meeting and a final meeting, both linked to a Multicore and Reconfigurable Supercomputing Conference, there will be 3 workshops to address different specific issues. There will be a number of scoping studies in which computing and application specialists will work together to assess the potential of FPGAs and/or GPUs for certain applications. There will be literature reviews which will collect and disseminate the state-of-the-art on certain key underlying issues. There will also be undergraduate student projects (funded via other EPSRC mechanisms) which are a cost effective way of tackling more application araeas and at the same time starting to train the next generation of computational scientists. Finally, there will be a website through which all of our results will be communicated to the wider UK research community.The main outcome from the project will be proposals for future collaborative research, building upon the foundations laid by this proposal. It is possible there may be one over-arching proposal covering all of the areas in this present proposal. Another possibility is that there may be three proposals, one on FPGAs, one on GPUs, and one on the common issues around accuracy and algorithms for finite precision arithmetic. A third possibility is that proposals will be constructed around an application theme, such as bio-informatics. Deciding on the best approach for future research is one of the challenges to be addressed in the project.
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Key Findings |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Project URL: |
http://www.oerc.ox.ac.uk/research/ccoe |
Further Information: |
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Organisation Website: |
http://www.ox.ac.uk |