| EPSRC Reference: |
EP/J003662/1 |
| Title: |
LowPowNoC - Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip |
| Principal Investigator: |
Soares Indrusiak, Dr L |
| Other Investigators: |
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| Researcher Co-Investigators: |
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| Project Partners: |
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| Department: |
Computer Science |
| Organisation: |
University of York |
| Scheme: |
First Grant - Revised 2009 |
| Starts: |
26 March 2012 |
Ends: |
25 December 2013 |
Value (£): |
99,685
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| EPSRC Research Topic Classifications: |
| Parallel Computing |
System on Chip |
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| EPSRC Industrial Sector Classifications: |
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| Related Grants: |
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| Panel History: |
| Panel Date | Panel Name | Outcome |
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13 Jul 2011
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EPSRC ICT Responsive Mode - July 2011
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Announced
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Summary on Grant Application Form |
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Multicore chips are currently the norm in enterprise, scientific and desktop computing and have already made inroads into mobile and embedded computing. One of the major problems faced by multicore system designers is to achieve maximum performance and functionality while respecting the power dissipation budget, which limits how much energy the system can take from mains or batteries. The power budget should be set as low as possible, because of energy costs, impact on the environment, battery lifetime, cooling costs, among other factors. This project aims to investigate and develop design techniques to optimise multicores in such a way that they can perform the same functionality with the same level of performance, while dissipating less power. The main focus of the techniques addressed by this project is the on-chip communication infrastructure, which was introduced to allow the multiple processing cores to exchange data and can account for up to 30% of the total power dissipated by the chip. To maximise the impact of this research to the UK and European economy, the project will address system-level techniques which are available to local system design and integration companies, rather than technology-specific techniques that require control of the chip fabrication process, which is often outsourced.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
https://sites.google.com/a/york.ac.uk/lowpownoc/ |
| Further Information: |
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| Organisation Website: |
http://www.york.ac.uk |