Details of Grant 

EPSRC Reference:	GR/J13441/01
Title:	CHARACTERISATION AND REDUCTION OF EDGE LEAKAGE CURRENTS IN HETERO- JUNCTION BIPOLAR TRANSISTORS
Principal Investigator:	Wood, Dr C
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department:	Electronic and Electrical Engineering
Organisation:	University of Sheffield
Scheme:	Standard Research (Pre-FEC)
Starts:	01 March 1993	Ends:	31 August 1995	Value (£):	90,866
EPSRC Research Topic Classifications:	Electronic Devices & Subsys.
EPSRC Industrial Sector Classifications:
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Panel History:
Summary on Grant Application Form
This proposal concerns details of the design of heterojunction bipolar transistors (HBTs), fabricated in the GaAs/AlGaAs material system, and potentially capable of handling large amounts of power efficiently at microwave frequencies. The objectives are (1) to characterise and investigate the reduction of mesa edge leakage currents using thinned emitter shoulder structures; (2) to carry out r.f. testing of devices to establish improved performance due to leakage suppression; and (3) to develop a model of edge leakage effects.Progress:In a p-n junction where surface and resistive effects are neglected, the measured current is the sum of two components - the diffusion current, which displays an ideality factor n of unity and is dominant under high bias, and the bulk recombination current, with n=2, dominant under low bias. In general, these two components may be separated and treated as independent. Where surface effects are significant, the mesa edge leakage and the extrinsic base surface recombination current must also be considered. In the course of this project it has been determined by varying the device dimensions that the n=1 current scales proportionally with the sum of the emitter-base junction area and the extrinsic base surface area, indicating that the base surface current has an ideality factor of unity. In addition, using rectangular-mesa HBTs of varying dimensions but constant area, the emitter edge leakage has been resolved as an n=2 current of magnitude proportional to the perimeter length. The resolution of the various emitter-base current components described above has been used to monitor the dependence of edge leakage currents on a number of fabrication and processing techniques. In this project, the incorporation of a thin shoulder of fully-depleted emitter material around the emitter mesa has been shown to provide an effective high-resistance pathway to edge leakage at the emitter-base junction. In addition, a reduction of up to 30% in the edge leakage current of GaAs/AlGaAs heterostructure diodes has been recorded as a result of brief post-fabrication etch treatments. Finally, success has been achieved in reducing edge leakage by means of the deposition of a passivating layer. Polyimide overgrowth has been shown to give a small but significant beneficial effect, whilst the deposition of an undoped AlGaAs overlayer on fabricated AlGaAs/GaAs HBTs virtually eliminates the edge component of the n=2 current, giving a 13-fold improvement in gain for 270x20-m2 rectangular devices. Work is currently under way on investigating the influence of the crystallographic orientation of finger-geometry HBTs on edge leakage and device performance. Early results suggest that, along with the factors described above, the consideration of device orientation may be an important part of high-speed integrated circuit design in the future.
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Organisation Website:	http://www.shef.ac.uk