EPSRC Reference: |
GR/K70748/01 |
Title: |
HIGH-LEVEL BEHAVIOURAL SYNTHESIS FOR LOW-POWER ASICS |
Principal Investigator: |
Brown, Professor AD |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Electronics and Computer Science |
Organisation: |
University of Southampton |
Scheme: |
Standard Research (Pre-FEC) |
Starts: |
01 October 1996 |
Ends: |
30 September 1999 |
Value (£): |
148,328
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EPSRC Research Topic Classifications: |
Design & Testing Technology |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
Complex application specific Ics (ASICs) are being increasingly utilised in portable equipment. Their high functionality per unit area makes them ideal for small hand held portable equipment such as portable telephones and palm computers. A major concern in the design of battery powered ASICs is their power consumption. The increasingly complex nature of ASICs makes the use of synthesis tools invaluable in their design and the use of high-level synthesis is becoming a necessity as device complexity grows. This research aims to combine high level synthesis with the techniques used in the design of low power ASICs such that low power systems may be automatically synthesised; thus bringing the advantages of synthesis, (fast design time and reduced design cost), into the area of design for low power, where such ASICs have previously been manually designed at great expense and design time.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.soton.ac.uk |