EPSRC Reference: |
GR/L27817/01 |
Title: |
LOW POWER ARCHITECTURES, CIRCUITS AND TECHNOLOGIES (POWERPACK) |
Principal Investigator: |
Woods, Professor RF |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Sch of Electronics, Elec Eng & Comp Sci |
Organisation: |
Queen's University of Belfast |
Scheme: |
Standard Research (Pre-FEC) |
Starts: |
01 May 1997 |
Ends: |
31 October 2000 |
Value (£): |
178,088
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EPSRC Research Topic Classifications: |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
To date, the main emphasis in high performance video chips has been to meet the demanding performance rather than power requirements. The objective of this work is to develop low power techniques at the algorithmic and architectural level which can be used in the next generation of high performance image processing chips for low power applications. This will involve exploring architectural level techniques such as parallelism and pipelining and using novel arithmetic schemes which reduce circuit transitions. A major part of the work will involve applying the ideas to a programmable image processing chip which has been developed as part of a collaborative project with Shorts Brothers. The current version of the chip operates at 54MHz and consumes 4W.As architectural transforms are heavily influenced by circuit and technology level issues, it is intended to collaborate closely with the other three universities in this area in order to achieve the low power goals. It is also intended to develop a portfolio of low power parameterisable image processing cores which will be of considerable interest to UK companies working in this area.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.qub.ac.uk |