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Details of Grant 

EPSRC Reference: GR/L35829/01
Title: NOVEL ALGORITHMS FOR ANALOGUE FAULT SIMULATION
Principal Investigator: Zwolinski, Professor M
Other Investigators:
Brown, Professor AD Wilkins, Dr B
Researcher Co-Investigators:
Project Partners:
Pre Nexus Migration
Department: Electronics and Computer Science
Organisation: University of Southampton
Scheme: Standard Research (Pre-FEC)
Starts: 15 October 1997 Ends: 14 February 2001 Value (£): 159,396
EPSRC Research Topic Classifications:
VLSI Design
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
The development of test stimuli for an electronic circuit requires the modelling and simulation of the circuit with each of the possible faults inserted one at a time. In digital circuit design, such techniques are well-established, and fast, efficient fault simulators exist. In analogue design, however, there are no suitable simulation tools and the large number of possible defects can each require long simulation times. Moreover, these simulations can often fail as the fault effect cause unusual behaviour. The object of this research is to investigate the effect of exploiting computational redundancy, whereby those parts of a faulty circuit that are behaving in an identical manner to the fault-free part are not re-evaluated. This will be achieved by modifying an existing circuit simulator, in which the circuit will be replicated with exactly one fault per copy. Potential trade-offs in the simulator between accuracy and simulation time will be investigated, as it is conceivable that any large differences between faulty and fault-free circuits will not need to be simulated with great accuracy. Further work will investigate issues of robustness and the equivalence of faults.
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Organisation Website: http://www.soton.ac.uk