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Details of Grant 

EPSRC Reference: GR/L35980/01
Title: A HARDWARE COMPILATION WORKBENCH
Principal Investigator: Gordon, Professor M
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department: Computer Science and Technology
Organisation: University of Cambridge
Scheme: Standard Research (Pre-FEC)
Starts: 01 June 1997 Ends: 31 May 2000 Value (£): 176,386
EPSRC Research Topic Classifications:
Parallel Computing
EPSRC Industrial Sector Classifications:
Related Grants:
Panel History:  
Summary on Grant Application Form
To create a workbench to assist in the development of hardware transformation/compilation systems. This will support the rapid prototyping of such systems, as well as flexible experimentation with them. The needs of Handel system at Oxford will drive and focus the research. The project will draw on the distinctive expertise of the Automated Reasoning Group at the University of Cambridge in the areas of theorem prover design, semantic embedding and hardware verification and of the Hardware verification and of the Hardware compilation group at Oxford University in the area of hardware compilation.
Key Findings
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Potential use in non-academic contexts
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Impacts
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Summary
Date Materialised
Sectors submitted by the Researcher
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Further Information:  
Organisation Website: http://www.cam.ac.uk