Details of Grant 

EPSRC Reference:	GR/L60531/01
Title:	ARTIFICIAL EVOLUTION PARALLEL DISTRIBUTED ELECTRONIC CIRCUITS DIRECTLY EXPLOITING RECONFIGURABLE HARDWARE
Principal Investigator:	Husbands, Professor P
Other Investigators:
Researcher Co-Investigators:
Project Partners:	Xilinx
Department:	Sch of Engineering and Informatics
Organisation:	University of Sussex
Scheme:	Standard Research (Pre-FEC)
Starts:	01 June 1997	Ends:	31 May 2000	Value (£):	161,333
EPSRC Research Topic Classifications:	System on Chip
EPSRC Industrial Sector Classifications:	No relevance to Underpinning Sectors
Related Grants:
Panel History:
Summary on Grant Application Form
Artificial evolution (e.g. the Genetic Algorithm) can be used to design engineering systems automatically. Usually, the system's behaviour is simulated, so its `fitness' at a task can be easily measured as new variations are generated. However, recent advances in reconfigurable silicon chips(e.g. Field-Programmable Gate Arrays, or FPGAs) means that electronic circuits can be evolved without the need for simulation. The behaviour and interconnections of the chip's components can be placed under evolutionary control; fitness' evaluations measure the real silicon's performance at the task. Evolution can be allowed to explore beyond the scope of conventional design and analysis methods, exploiting the natural properties (physics) of the chip more effectively: Pilot studies at the University of Sussex have shown extremely efficient parallel distributed circuits to result.We propose to develop this very promising technique towards real-world applications, e.g. pattern recognition or signal processing. In the pilot studies, the circuits were found to be closely tailored to the conditions in which they evolved: to induce the robustness to device variations, temperature, and power-supply voltage needed in an industrial application, we propose to evaluate the circuits on multiple FPGA chips with different temperatures and voltages. Evolution can integrate considerations of size, power-use, and fault-tolerance with the behavioural requirements, and these issues will be included in the development of methods for evolving more complex circuits.
Key Findings
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Potential use in non-academic contexts
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Further Information:
Organisation Website:	http://www.sussex.ac.uk