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Details of Grant 

EPSRC Reference: GR/L85206/01
Title: JREI:CS-2 UPGRADE TO A SHARED MEMORY - MULTIPROCESSOR ARCHITECTURE
Principal Investigator: Reeve, Dr J
Other Investigators:
Zaluska, Mr EJ Nunn, Dr D
Researcher Co-Investigators:
Project Partners:
Quadrics Supercomputers World Ltd
Department: Electronics and Computer Science
Organisation: University of Southampton
Scheme: JREI
Starts: 01 February 1998 Ends: 31 January 1999 Value (£): 32,195
EPSRC Research Topic Classifications:
Parallel Computing System on Chip
EPSRC Industrial Sector Classifications:
No relevance to Underpinning Sectors
Related Grants:
Panel History:  
Summary on Grant Application Form
This is a proposal to upgrade the Meiko CS-2 distributed memory multiprocessor machine, currently used by the Concurrent Computation Group, to an enhanced performance shared memory distributed processor architecture. This will give the group a state of the art parallel computer with a further 3 working years. Besides being used as the principle resource for the group's own staff and postgraduate students, the enhanced machine will be used to support a number of specific projects. These include the development of broadband SONAR algorithms for parallel embedded architectures, the simulation of radiation effects on the experiments and payload of the INTEGRAL space probe and the development of WEB interfaces to federated databases using Common Gateway Interface and/or Java with CORBA. The upgrade is designed so that existing codes will continue to run as before but with enhanced performance and will enable experimentation in algorithm development for state of the art architectures. (The upgrade puts the machine in the same class as the architecture prescribed in the American DoE, ASCI BLUE programme). As in the past the CS-2 will used to support the coursework element of selected courses in the Departments prestigious MEng in Information Engineering.
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Summary
Date Materialised
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Further Information:  
Organisation Website: http://www.soton.ac.uk