EPSRC Reference: |
GR/M96896/01 |
Title: |
A SYSTEM LEVEL INTEGRATION APPROACH TO HIGH PERFORMANCE MICRO-ARCHITECTURE |
Principal Investigator: |
O'Boyle, Professor M |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Sch of Informatics |
Organisation: |
University of Edinburgh |
Scheme: |
Overseas Travel Grants Pre-FEC |
Starts: |
15 June 2001 |
Ends: |
14 June 2002 |
Value (£): |
9,386
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EPSRC Research Topic Classifications: |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
Future high performance computing systems will rely increasingly on the concept of system level integration , wherein logic, memory and analogue ciruitry is integrated to form a complete system on a chip (SoC). Research in this area typically focuses on either process technology or complexity management issues. However, there are many issues in micro architecture which currently impede the development of future high performance SoC devices. The aim of this project is to use a sabbatical period to visit two of the most widely-respected and prolific research centres in micro-architecture, at the University of Wisconsin (Madison, USA) and the University of Michigan (Ann Arbor, USA). Both groups are world leaders in the development of new micro-architectures for billion-transistor silicon chips, on which future SoC systems will depend.This project has three goals; (i) to collaborate in the current research activities if the host research groups, (ii) to develop an agenda for future collaborative research activities, (iii) to strengthen the UKs international research presence in micro-architecture and system level integration.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.ed.ac.uk |