| EPSRC Reference: |
GR/M99606/01 |
| Title: |
ROPA: 3D SEMICONDUCTER DEVICES BASED ON SILICON ON SAPPHIRE TECHNOLOGY |
| Principal Investigator: |
Udrea, Professor F |
| Other Investigators: |
|
| Researcher Co-Investigators: |
|
| Project Partners: |
|
| Department: |
Engineering |
| Organisation: |
University of Cambridge |
| Scheme: |
ROPA |
| Starts: |
30 June 2000 |
Ends: |
29 June 2002 |
Value (£): |
102,909
|
| EPSRC Research Topic Classifications: |
| Electronic Devices & Subsys. |
|
|
| EPSRC Industrial Sector Classifications: |
|
| Related Grants: |
|
| Panel History: |
|
|
Summary on Grant Application Form |
|
This project aims at developing a new generation of silicon-based high voltage devices using actively the third dimension. Whereas classical semiconductor devices are based on the repetition of a 2D geometrical structure, the new 3D devices have a fundamental 3D functionality, which results in unprecedented high breakdown voltages and high current capabilities. The use of silicon on sapphire (SOS) technology offers an ideal solution for the application of the 3D device concept due to its excellent thick substrate isolation high thermal conductivity and low leakage currents. The 3D concept re-establishes the ideal limits of silicon, challenges the fundamental bases of semiconductor theory and stretches our own understanding to a new dimension.
|
|
Key Findings |
|
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
|
|
Potential use in non-academic contexts |
|
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
|
|
Impacts |
|
| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
|
| Date Materialised |
|
|
|
|
Sectors submitted by the Researcher |
|
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
|
| Project URL: |
|
| Further Information: |
|
| Organisation Website: |
http://www.cam.ac.uk |