EPSRC Reference: |
GR/R52299/01 |
Title: |
VLSI Sctructures for Globally Asynchronous Systems. |
Principal Investigator: |
Moore, Professor S |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Computer Science and Technology |
Organisation: |
University of Cambridge |
Scheme: |
Standard Research (Pre-FEC) |
Starts: |
01 October 2001 |
Ends: |
30 November 2004 |
Value (£): |
184,998
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EPSRC Research Topic Classifications: |
Networks & Distributed Systems |
System on Chip |
VLSI Design |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
Clocked circuit design is a mature method with good tool support. Whilst clocked circuits are becoming impractical for large deep submicron CMOS designs, for smaller circuits assumptions about clock distribution are still valid. Given the investment in clocked tools and techniques, clocked design in the small will continue to be an attractive technique in industry.With globally asynchronous locally synchronous (GALS) systems, reliable high performance asynchronous communication techniques are used for long distance communication between smaller synchronous (clocked) subsystems. We believe that a predefined library of carefully designed asynchronous interface components could be used by clocked systems designers to act like the glue between synchronous subsystems. This amalgam allows the clean composition properties of asynchronous circuits to be combined with the simplicity of small scale synchronous design.The proposed research will investigate various approaches to GALS technology and develop favoured solutions through to silicon implementations.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.cam.ac.uk |