EPSRC Reference: |
GR/R52688/01 |
Title: |
A programmable focal-plane analogue processor array |
Principal Investigator: |
Dudek, Professor P |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Electrical and Electronic Engineering |
Organisation: |
University of Manchester, The |
Scheme: |
Fast Stream |
Starts: |
07 March 2002 |
Ends: |
06 June 2004 |
Value (£): |
60,924
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EPSRC Research Topic Classifications: |
Digital Signal Processing |
Image & Vision Computing |
Parallel Computing |
System on Chip |
VLSI Design |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
The pre-processing of image sensor information directly on the focal plane, with parallel processing elements integrated within pixels on a single CMOS chip, is potentially advantageous in terms of cost, power dissipation and computing performance over more traditional methods of image processing. Amongst such vision chips the ones employing analogue circuits are efficient in terms of silicon area, whereas the ones using digital processors offer the flexibility of a software-programmable solution. Our approach combines the two paradigms via the novel application of an analogue microprocessor. A small-size prototype vision chip has been already demonstrated. In the course of the proposed research the circuitry and the architecture of the processor will be refined with a view to optimising its performance for low-level image processing tasks. In order to demonstrate the capabilities of the massively parallel analogue processor array a VLSI chip containing 128x128 processors will be designed and fabricated in 0.35um technology. This device will then be deployed to execute numerous lowlevel image processing algorithms with unprecedented efficiency in terms of performance, cost and power dissipation. This is important for many real-time computer vision systems in such diverse application areas as industrial inspection, robotics, security surveillance, target tracking, autonomous vehicle guidance and multimedia, to name just a few. The developed circuit will advance the state-of-the-art in programmable focal-plane processor arrays and demonstrate the feasibility of the technique to tackle practical computer vision problems.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.man.ac.uk |