| EPSRC Reference: |
GR/S20260/01 |
| Title: |
Engineering Doctorate Centre: System Level Integration |
| Principal Investigator: |
Beaumont, Professor S |
| Other Investigators: |
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| Researcher Co-Investigators: |
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| Project Partners: |
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| Department: |
Electronics and Electrical Engineering |
| Organisation: |
University of Glasgow |
| Scheme: |
Engineering Doctorate |
| Starts: |
01 October 2002 |
Ends: |
31 March 2004 |
Value (£): |
681,472
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| EPSRC Research Topic Classifications: |
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| EPSRC Industrial Sector Classifications: |
| Communications |
Electronics |
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| Related Grants: |
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| Panel History: |
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Summary on Grant Application Form |
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To establish a co-ordinated strategic and applied research programme of world class standing with strong industrial links in the area of System-on-Chip and related System level Integration technologies.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
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| Further Information: |
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| Organisation Website: |
http://www.gla.ac.uk |