Details of Grant 

EPSRC Reference:	GR/T18271/01
Title:	Statistical 3D Simulation of Intrinsic Parameter Fluctuations in Decanoneter MOSFETs Introduced by Discreteness of Charge and Matter
Principal Investigator:	Asenov, Professor A
Other Investigators:	Barker, Professor JR Watling, Dr J Roy, Professor S
Researcher Co-Investigators:
Project Partners:
Department:	Electronics and Electrical Engineering
Organisation:	University of Glasgow
Scheme:	Standard Research (Pre-FEC)
Starts:	14 March 2005	Ends:	13 March 2007	Value (£):	115,336
EPSRC Research Topic Classifications:	Electronic Devices & Subsys.
EPSRC Industrial Sector Classifications:	Electronics
Related Grants:
Panel History:
Summary on Grant Application Form
Near the end of the current edition of the International Roadmap for Semiconductors (ITRS) in 2018, transistors with sub-10 nm dimensions are anticipated to be in mass production. Some progress has been made in modelling and understanding atomic scale effects in nano-CMOS transistors, however due to the lack of sufficient computing power little has been done to systematically study and accurately predict the scale of the intrinsic fluctuations in the next generations MOSFETs, or their impact on circuit and system performance. The simulation difficulties, and the required computing times, are immense due to complex device technology and the need to carry out simulations of large samples of statistically different devices in 3D.The access to HPC facilities will facilitate the development at Glasgow of one of the most advanced atomistic simulation tools for nano-CMOS devices in the world and apply them to practical engineering of nanoscale CMOS devices at the end of the roadmap and beyond. The access will enhance our performance in, and increase the quality and quantity of research results produced from the following active grants of the DMG: Atomistic Simulation of Nanoscale Devices, EPSRC Platform Grant, Understanding and Utilising Fluctuations in Systems of Deep Submicron MOS Devices, EPSRC Grant, SINANO, EC Network of Excellence, Intrinsic Fluctuations in Decanano Silicon Devices: Impact on Scaling, Device Architecture and Circuit Performance, IBM, Shared University Research (SUR) Grant. It will foster the development of several new proposals to EPSRC, EC, SRC, SEMATECH, NASA and DARPA.
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