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Name: |
Professor S Jones |
Organisation: |
University of Bath |
Department: |
Electronic and Electrical Engineering |
Current EPSRC-Supported Research
Topics: |
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Current EPSRC Support |
There is no current EPSRC Support |
Previous EPSRC Support |
GR/R23091/01 | Compressed Memory Technologies For Embedded Systems and Internet Appliances | (P) |
GR/M56579/01 | SILICON AND NEUROBIOLOGY:TOWARDS A MIXED COMPUTATIONAL PARADIGM | (C) |
GR/L96981/01 | SPECIAL PURPOSE PROCESSORS FOR CONTROL SYSTEMS - CONTINUATION STUDY | (C) |
GR/L54530/01 | COMPRESSED MAIN MEMORY: A FEASIBILITY STUDY | (P) |
GR/J13892/01 | SPECIAL PURPOSE PROCESSORS FOR CONTROL SYSTEMS | (C) |
GR/J13939/01 | ALTERNATIVE DATA CODING TECHNIQUES FOR SIMPLIFIED TESTING OF HIGH- COMPLEXITY DIGITAL SYSTEMS | (P) |
GR/H42604/01 | APPLICATION OF NEURAL NETWORKS IN QUALITY CONTROL OF PERFORMANCE PRODUCTS | (C) |
GR/H89708/01 | REAL-TIME COMPRESSION AND ENCRYPTION OF INFORMATION IN MULTI-MEDIA NETWORK | (P) |
GR/H89838/01 | PICA-PARALLEL INTEGRATION OF COMPRESSION ALGORITHMS | (P) |
GR/H90728/01 | REAL TIME CONTROLLER DESIGN BASED ON PACE | (P) |
GR/H18548/01 | SCOPE AND POTENTIAL OF REDIX 2N SYSTOLIC ARRAYS FOR SIGNAL AND IMAGE PROCESSING | (C) |
GR/H17947/01 | PICA PARALLEL INTEGRATION OF COMPRESSION ALGORITHMS | (P) |
GR/F89718/01 | SCOPE AND POTENTIAL OF SELF-TIMING IN SYSTOLIC ARRAYS | (P) |
GR/F86007/01 | REAL-TIME COMPRESSION AND ENCRYPTION OF MULTI- MEDIA NETWORK | (P) |
GR/F58202/01 | REAL-TIME CONTROLLER DESIGN BASED ON PAGE | (P) |
GR/F65118/01 | VLSI KALMAN FILTERS A FEASIBILITY STUDY | (C) |
GR/F23866/01 | VERSATILE INTERACTIVE OPTIMISATION FOR CACSD | (C) |
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Key: (P)=Principal Investigator, (C)=Co-Investigator, (R)=Researcher Co-Investigator
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