EPSRC Reference: |
EP/M00113X/1 |
Title: |
Error-tolerant Stream Processing System Design (ESP-SD) |
Principal Investigator: |
Andreopoulos, Professor Y |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Electronic and Electrical Engineering |
Organisation: |
UCL |
Scheme: |
Standard Research |
Starts: |
03 November 2014 |
Ends: |
02 November 2017 |
Value (£): |
469,400
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EPSRC Research Topic Classifications: |
Computer Sys. & Architecture |
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EPSRC Industrial Sector Classifications: |
Electronics |
Information Technologies |
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Related Grants: |
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Panel History: |
Panel Date | Panel Name | Outcome |
03 Jun 2014
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EPSRC ICT Responsive Mode - June 2014
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Announced
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Summary on Grant Application Form |
The energy dissipation and fault rates in future CMOS integration are expected to require the abandonment of traditional system reliability in favour of approaches that control errors across the application, runtime support, and system architecture. Commercial stakeholders of stream processing applications, such as multimedia analysis & retrieval and webpage ranking systems, already feel the strain of inadequate system-level scaling and robustness under increasing user demand. While such applications can tolerate certain imprecision (errors) in their calculations, this aspect is currently not used for system scalability and resilience.
The ESP-SD project will derive theory, methods, and a prototype set of tools for scalable adjustment of computation and error-propagation in stream processing applications operating under a fault-generating computing environment. This will be achieved via the following innovations:
* stochastic models of error tolerance in algorithms for multimedia and linked-data analytics (used in audio/video matching, semantic multimedia retrieval, webpage ranking systems, etc.);
* new forms of accelerated error-tolerant computation within numerical stream processing libraries;
* opportunistic designs for compiler and runtime support offering graceful resilience to runtime errors.
ESP-SD aims for up to two orders of magnitude of throughput and energy scaling against conventional processing (under the same platform), with application results that are reliable in a stochastic sense. That is, all mechanisms for acceleration, energy saving and reliability in ESP-SD are geared towards minimizing the "expected" error in applications, and not the worst-case error.
The project will derive practical designs demonstrating its impact, examples of which are provided in the "Impact Summary" and the "Pathways to Impact" on JeS.
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Key Findings |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Project URL: |
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Further Information: |
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Organisation Website: |
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