| EPSRC Reference: |
GR/K61913/01 |
| Title: |
DESIGN TOOLS FOR HIGH-SPEED ASYNCHRONOUS CIRCUITS |
| Principal Investigator: |
Furber, Professor S B |
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| Department: |
Computer Science |
| Organisation: |
Victoria University of Manchester, The |
| Scheme: |
ROPA |
| Starts: |
09 October 1995 |
Ends: |
08 October 1998 |
Value (£): |
115,550
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| EPSRC Research Topic Classifications: |
| Design & Testing Technology |
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Summary on Grant Application Form |
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Asynchronous logic is attracting increasing commercial interest; recent large-scale demonstrators have shown the feasibility of asynchronous commercial-state designs. However, support for asynchronous design in current VLSI CAD tools is very poor, so advances in tools for asynchronous design are required before it can gain wider applicability. The proposed work addresses this issue, building on experience gained from the best tools and design techniques available today, to develop a new tool for asynchronous design.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
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| Description |
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| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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