| EPSRC Reference: |
GR/L27930/01 |
| Title: |
LOW POWER ARCHITECTURES, CIRCUITS AND TECHNOLOGIES (POWERPACK) |
| Principal Investigator: |
Furber, Professor S B |
| Other Investigators: |
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| Department: |
Computer Science |
| Organisation: |
Victoria University of Manchester, The |
| Scheme: |
Standard Research (Pre-FEC) |
| Starts: |
12 May 1997 |
Ends: |
11 October 2000 |
Value (£): |
201,980
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Summary on Grant Application Form |
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The power-efficiency of general-purpose microprocessors has only recently become a significant issue with the increasing market for battery-powered portable computer equipment (which is not limited to lap-top computers, but also includes mobile telephones, personal digital assistants, etc). A significant source of power-inefficiency in modern digital electronics is the use of a free-running clock to synchronise all state transitions within a circuit. This clock causes logic gates to switch, using power, whether or not they are doing useful work. A self-time design methodology overcomes this inefficiency, but introduces other design issues.The proposed work is a directed investigation of the issues of self-timed processor design, bringing asynchronous control together with other characteristics of power-efficient processors such as high code density (which minimises off-chip activity) and parallel execution (which enables a given performance to be delivered at a minimum supply voltage.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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